Cache Modeling Architect

Job description

IBM is currently hiring a Memory Systems Performance Architect for the POWER Systems Performance team.

Location: Austin, TX.

We are looking for a highly capable Performance Architect to focus on architectural exploration and performance modeling of advanced cache and memory subsystem features for the next generation of POWER CPUs. You will own or participate in the following:

Responsibilities include:
·  Collaborate with micro-architecture team to identify opportunities for product improvement and exploration in the cache and memory subsystem space.
·  Self-guided performance simulation studies of design alternatives.
·  Write and maintain features and sections of cache and memory performance models.
·  Work collaboratively with the team responsible for SOC level system modeling.
·  Collaborate with the performance team to maintain and improve the simulation environment for increased productivity.
·  Leverage IBM as a global company to achieve local business objectives.

Auto req ID

136289BR
Required Education

Master's Degree
Role ( Job Role )

Microprocessor Development Engineering Prof
State / Province

TEXAS
Primary job category

Hardware Development & Support
Company

(0147) International Business Machines Corporation
Contract type

Regular
Employment Type

Full-Time
Is this role a commissionable/sales incentive based position?

No
Travel Required

Up to 10% or 1 day a week
IBM Business Group

Systems
Preferred Education

Doctorate Degree
City / Township / Village

AUSTIN
EO Statement

IBM is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Required Technical and Professional Expertise

·  Strong background in caches, coherency protocols, interconnects, and related topics.
·  Solid CPU architecture knowledge, micro-architecture knowledge, and an understanding of competing architectures.
·  Experience working in a CPU/SOC performance modeling environment.
·  Proficient in C and C++. Strong software design skills are a large plus.
·  Proficient in scripting languages such as Perl, Python and Ruby
·  Ability to problem solve and prove your own ideas
·  Knowledge and experience with common performance benchmarks and workloads
·  Knowledge of SOC architecture, OS internals, and compiler technology are a plus

Country/Region

United States
Preferred Technical and Professional Experience

·  Innately driven to succeed, while also very collaborative.
·  Intellectual curiosity in general and especially towards technology.
·  Creative problem solver.
·  Positive, motivational, and inspiring.
·  Highly organized with exceptional follow up skills.

Eligibility Requirements

NA
Position Type

Early Professional
Early Professional Track

Track unaligned