Analog Test and Validation Engineer

Job description

Job Description

It's more than Validation. It's Intel's Validation.

Intel invites you to bring your Validation expertise to our MVE (Manufacturing Validation Engineering) group.

About the role -

As an experienced Test and Validation Engineer at MVE you will have a meaningful effect on the next generation processors, working shoulder to shoulder with the Design and Architecture teams. Get ready to function as a technological detective to solve highly challenging puzzles and drive Intel's core products to the max.

Responsibilities -

Responsible for ensuring the performance of analog circuits from the component feasibility stage through production ramp.

Evaluation, development and debug of complex test and validation methods.

Develops and debugs complex test flows to validate circuits and interconnects performance using state of the art test equipment.

Analyzes and evaluates component performance versus specifications to ensure components are meeting both performance and yield targets.

Analyzes customer returns with emphasis on driving test hole closure activities.

Creates and applies concepts for optimizing component production relative to both quality and cost constraints.

Be the gate keeper of Intel's quality.

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Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel's next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Desired profile

Qualifications

You should have:

·  Analog design or testing / validation experience is required.
·  Development, evaluation and validation of analog and DFT circuits experience.
·  Statistical and JMP knowledge to generate reports and articulate data
·  Strong spoken and written communication skills
·  Understanding of device physics

·  Advantage:
·  Basic DFT architecture knowledge.
·  Experience driving tester to support debug and characterization of silicon.