Staff Design Engineer

Description de l'offre

Job Description

Introduction:

ARM offers IC designers a wide range of choices from its broad portfolio of standard cell, memory, and I/O products. The ARM product line is optimized for each silicon technology. ARM's Process-Perfect™ Design Methodology includes comprehensive QA and validation procedures that can enable accurate designs with high manufacturing yields. ARM products have been used in circuits running as fast as 2GHz+ and are in production or development at 250nm, 180nm, 150nm, 130nm, 90nm, 65nm, 45nm, 28nm, 20nm and 14/16nm,10nm, 7nm Finfet semiconductor processes for various foundries and IDMs.

Our circuit group comprises some of the industry’s leading experts in deep submicron circuit design, design for manufacturing (DFM) and ESD techniques. This position is a rare opportunity for a circuit professional to work with a very successful circuit and layout team. The team has exposure to a wide variety of design rules from leading edge foundries as well as design teams from many of the world’s leading developers of digital ICs making for an ideal learning environment.

Job Purpose:

The Staff I/O Design Engineer will be responsible for the development of I/O libraries in a wide variety of different processes. He will work as part of a small team to create product specifications, optimize schematics, develop layout, drive the mask design team, participate to generation and validation of all supported EDA views, using a variety of internally developed and external standard EDA flows.

To fulfil this task, the Staff I/O Design Engineer will need to interact with multiple teams across ARM’s Physical Design Group.

The Physical IP I/Os to be developed span a wide range from our popular low power, high density General Purpose I/O (GPIO) and could include also other SPIO standards such as LVDS, SSTL, HSTL...
The I/Os are optimized for each silicon technology.

Accountabilities / Responsibilities:

·  Circuit design of I/O cells including crystal oscillators, and advanced power management cells
·  Understanding of ESD and latch-up constraints on I/O design. Ability to create an ESD network.
·  Verification of functionality, performance & power of developed circuits
·  Good understanding of layout to effectively drive the mask design team and perform layout development tasks
·  Understanding of deep submicron device physics in order to account for these non-ideal effects during cell design
·  Generation and testing of all views delivered with our Physical IP product lines
·  Understanding or an ability to learn a wide variety of industry standard modelling formats including: Liberty (NLM), Verilog, LEF, IBIS…
·  Lead a small team to fully develop and verify an I/O library at advanced process nodes
·  Communicate effectively with external customers
·  Create and maintain product specifications

Job Requirements

Education & Qualifications

·  Qualified candidates will have a university degree(s) in Electronic Engineering, Computer Engineering or other relevant technical discipline.
·  Industry Experience designing IO libraries or analog circuits

Essential Skills & Experience

Specifically, candidates should have:

·  An understanding of MOSFET electrical characteristics
·  An understanding of power, performance, and area tradeoffs
·  An understanding of I/O specific constraints
·  Understanding of layout at the transistor level
·  Understanding of Design For Manufacturability (DFM) layout techniques
·  Fundamental understanding of ESD and Latch-up issues and solutions
·  Experience with transistor level circuit simulators
·  Experience with Schematic and Layout Capture: Cadence schematic or equivalent.
·  Experience with backend verification tools: DRC, LVS (HERCULES, CALIBRE, ICV)
·  Experience with LEF and/or Milkyway view formats
·  Understanding of extraction methodologies and limitations
·  Diagnostic skills for tools and resultant reports
·  Knowledge of shell/tcl/Perl scripting

Desirable Skills & Experience

Other relevant skills include:

·  Experience in IO usage in chip level
·  An understanding of modelling languages including Verilog and VHDL.
·  An understanding of transistor level device physics
·  An understanding of P&R with I/O rings.
·  Basic Source control management with tool such as DesignSync

Interpersonal Skills

It is essential for the successful applicant to:

·  Co-operate & communicate well with I/O development team
·  Proficient in English with good communication skills, oral and written
·  Be motivated to continuously develop skills and accept a variety of responsibilities as part of contributing to the design center’s success
·  Demonstrate a positive attitude and respect for all members of the team
·  Be willing to iteratively improve designs and repeatedly attempt to develop solutions to difficult problems

Benefits

Your particular benefits package will depend on position and type of employment and may be subject to change. Your package will be confirmed on offer of employment. ARM's benefits program provides permanent employees with the opportunity to stay innovative and healthy, ensure the wellness of their families, and create a positive working environment.

·  Annual Bonus Plan
·  Discretionary Cash Award
·  Supplementary pension
·  Private Medical Insurance (employee & family)
·  Life Insurance
·  Holiday, 25 days annual leave
·  Sabbatical, 20 paid business days every four-years of service
·  Volunteering, One (1) paid working day each year (TeamARM)
·  Others, free car parking, luncheon vouchers & Public Transport Pass reduction, team and social events

About ARM

ARM® technology is at the heart of a computing and connectivity revolution that is transforming the way people live and businesses operate. From the unmissable to the invisible; our advanced, energy-efficient processor designs are enabling the intelligence in 86 billion silicon chips and securely powering products from the sensor to the smartphone to the supercomputer. With more than 1,000 technology partners including the world's most famous business and consumer brands, we are driving ARM innovation into all areas compute is happening inside the chip, the network and the cloud.

With offices around the world, ARM is a diverse community of dedicated, innovative and highly talented professionals. By enabling an inclusive, meritocratic and open workplace where all our people can grow and succeed, we encourage our people to share their unique contributions to ARM's success in the global marketplace.