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Similar Jobs Mixed Signal Design Integration Engineer

  • Folsom (Sacramento County)
  • Design / Civil engineering / Industrial engineering

Job description

Job Description

·  A member of the NAND design team focused on validating the chip. The focus is on using full chip simulations to check for integration issues with power, electro-migration, functionality, performance, and reliability.
·  The NAND design uses a wide range of circuits including high voltage circuits, charge pumps, voltage regulators, synthesized logic, memory related circuits, a high speed IO Data path, and an on-chip programmable micro-controller. The job is to make sure the all circuits/sub-blocks are integrated and that the product is both functional, as well as, reliable.

Inside this Business Group

Non-Volatile Solutions Memory Group: The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices. The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.

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Desired profile

Qualifications

Minimum requirements

·  BS in electrical engineering with coursework in analog and digital integrated circuit design, MOS device physics, digital circuits, computer architecture, and programming.
·  BS +1 year of experience, or MS +0 years of experience.
·  1 year working in the Linux operating system with tools like gvim, grep, etc.
·  1 year writing scripts in languages like Python, Perl, or TCL.
·  1 year running analog circuit simulation using HSPICE.
·  1 year running mixed-signal circuit simulations using Verilog-AMS modeling.

Preferred experience

·  MS in electrical engineering with a focus on integrated circuit design.
·  BS +3 years of experience, or MS +2 years of experience.
·  A passion for integrated circuit design.
·  An understanding of full chip layout issues like chip planning, power bussing, and signal integrity.
·  Experience with memory design. In particular NAND memory design.
·  An understanding of mixed signal design issues and having worked on large mixed-signal chips.
·  Experience in design for reliability including aging simulations, safe operating area (SOA/EOS) using cck, electro-migration verification, and electrical rule checks using PERC.

Preferred MOS design skills

·  Design of analog circuits such as op amps, voltage regulators, charge pumps, and high voltage level shifters. Understand feedback and stability.
·  Design of digital circuits such a logic blocks, latches, and SRAM's. An understanding of timing issues.
·  An understanding of MOS device physics such as threshold voltage, mobility, and capacitances.
·  An understanding of MOS reliability issues such as hot carriers, bias temperature instability, ESD, and electro-migration.

Preferred CAD tool skills

·  Simulation of analog and digital circuits from within a CAD tool environment.
·  Schematic entry using Cadence Virtuoso.
·  Parasitic extraction with tools like StarRC.
·  The ability to look at and understand layout using Cadence Virtuoso.

Preferred Lab skills

·  Experience with lab equipment like voltage supplies, oscilloscopes, and parameter analyzers.
·  Experience micro-probing wafers.

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